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| PIMC31 500 mA, 50 V NPN/PNP double resistor-equipped transistor; R1 = 1 k, R2 = 10 k Rev. 01 -- 24 March 2009 Product data sheet 1. Product profile 1.1 General description 500 mA, 50 V NPN/PNP double Resistor-Equipped Transistor (RET) in a small SOT457 (SC-74) Surface-Mounted Device (SMD) plastic package. NPN/NPN complement: PIMN31 1.2 Features I I I I I I 500 mA output current capability Built-in bias resistors Simplifies circuit design Reduces component count Reduces pick and place costs AEC-Q101 qualified 1.3 Applications I Digital application in automotive and industrial segments I Switching loads 1.4 Quick reference data Table 1. Symbol VCEO IO R1 R2/R1 Quick reference data Parameter collector-emitter voltage output current bias resistor 1 (input) bias resistor ratio Conditions open base Min 0.7 9 Typ 1 10 Max 50 500 1.3 11 Unit V mA k Per transistor; for the PNP transistor with negative polarity NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 2. Pinning information Table 2. Pin 1 2 3 4 5 6 Pinning Description GND (emitter) TR1 input (base) TR1 output (collector) TR2 GND (emitter) TR2 input (base) TR2 output (collector) TR1 1 2 3 TR1 R2 R1 R1 R2 TR2 Simplified outline 6 5 4 Graphic symbol 6 5 4 1 2 3 006aaa143 3. Ordering information Table 3. Ordering information Package Name PIMC31 SC-74 Description plastic surface-mounted package (TSOP6); 6 leads Version SOT457 Type number 4. Marking Table 4. PIMC31 Marking codes Marking code ZH Type number 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO VI Parameter collector-base voltage collector-emitter voltage emitter-base voltage input voltage TR1 positive negative input voltage TR2 positive negative +5 -10 V V +10 -5 V V Conditions open emitter open base open collector Min Max 50 50 5 Unit V V V Per transistor; for the PNP transistor with negative polarity PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 2 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k Table 5. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol IO Ptot Per device Ptot Tj Tamb Tstg [1] Parameter output current total power dissipation total power dissipation junction temperature ambient temperature storage temperature Conditions Tamb 25 C Tamb 25 C [1] Min -55 -65 Max 500 290 420 150 +150 +150 Unit mA mW mW C C C [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 500 Ptot (mW) 400 006aab531 300 200 100 0 -75 -25 25 75 125 175 Tamb (C) FR4 PCB, standard footprint Fig 1. Power derating curve 6. Thermal characteristics Table 6. Symbol Rth(j-a) Rth(j-sp) Per device Rth(j-a) [1] Thermal characteristics Parameter thermal resistance from junction to ambient thermal resistance from junction to solder point thermal resistance from junction to ambient in free air [1] Conditions in free air [1] Min - Typ - Max 431 105 Unit K/W K/W Per transistor - - 298 K/W Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 3 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 103 Zth(j-a) (K/W) 102 0.20 0.10 0.05 10 0.02 0.01 =1 0.75 0.50 0.33 006aaa494 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 7. Characteristics Table 7. Characteristics Tamb = 25 C unless otherwise specified. Symbol ICBO ICEO IEBO hFE VCEsat VI(off) VI(on) R1 R2/R1 Cc Parameter collector-base cut-off current collector-emitter cut-off current emitter-base cut-off current DC current gain collector-emitter saturation voltage off-state input voltage on-state input voltage bias resistor 1 (input) bias resistor ratio collector capacitance TR1 (NPN) TR2 (PNP) VCB = 10 V; IE = ie = 0 A; f = 1 MHz 7 11 pF pF Conditions VCB = 50 V; IE = 0 A VCE = 50 V; IB = 0 A VEB = 5 V; IC = 0 A VCE = 5 V; IC = 50 mA IC = 50 mA; IB = 2.5 mA VCE = 5 V; IC = 100 A VCE = 0.3 V; IC = 20 mA Min 70 0.3 0.4 0.7 9 Typ 0.6 0.8 1 10 Max 100 0.5 0.72 0.3 1 1.4 1.3 11 V V V k Unit nA A mA Per transistor; for the PNP transistor with negative polarity PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 4 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 103 006aaa314 10-1 006aaa315 (1) hFE (1) (2) (3) VCEsat (V) (2) (3) 102 10 1 10-1 1 10 102 IC (mA) 103 10-2 1 10 102 IC (mA) 103 VCE = 5 V (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -40 C IC/IB = 20 (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -40 C Fig 3. TR1 (NPN): DC current gain as a function of collector current; typical values Fig 4. TR1 (NPN): Collector-emitter saturation voltage as a function of collector current; typical values 006aab055 1 VCEsat (V) (1) (2) (3) 10-1 10-2 1 10 102 IC (mA) 103 IC/IB = 50 (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -40 C Fig 5. TR1 (NPN): Collector-emitter saturation voltage as a function of collector current; typical values PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 5 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 10 006aaa316 1 (1) (2) 006aaa317 VI(on) (V) VI(off) (V) (3) 1 (1) (2) (3) 10-1 10-1 1 10 102 IC (mA) 103 10-1 10-1 1 IC (mA) 10 VCE = 0.3 V (1) Tamb = -40 C (2) Tamb = 25 C (3) Tamb = 100 C VCE = 5 V (1) Tamb = -40 C (2) Tamb = 25 C (3) Tamb = 100 C Fig 6. TR1 (NPN): On-state input voltage as a function of collector current; typical values Fig 7. TR1 (NPN): Off-state input voltage as a function of collector current; typical values PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 6 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 103 (1) 006aaa349 -10-1 006aaa350 (1) (2) hFE (2) (3) VCEsat (V) (3) 102 10 1 -10-1 -1 -10 -102 IC (mA) -103 -10-2 -1 -10 -102 IC (mA) -103 VCE = -5 V (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -40 C IC/IB = 20 (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -40 C Fig 8. TR2 (PNP): DC current gain as a function of collector current; typical values Fig 9. TR2 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values 006aab428 -1 VCEsat (V) (1) (2) (3) -10-1 -10-2 -1 -10 -102 IC (mA) -103 IC/IB = 50 (1) Tamb = 100 C (2) Tamb = 25 C (3) Tamb = -40 C Fig 10. TR2 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 7 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k -10 006aaa351 -10 006aaa352 VI(on) (V) (1) (2) VI(off) (V) (1) -1 (3) -1 (2) (3) -10-1 -10-1 -1 -10 -102 IC (mA) -103 -10-1 -10-1 -1 IC (mA) -10 VCE = -0.3 V (1) Tamb = -40 C (2) Tamb = 25 C (3) Tamb = 100 C VCE = -5 V (1) Tamb = -40 C (2) Tamb = 25 C (3) Tamb = 100 C Fig 11. TR2 (PNP): On-state input voltage as a function of collector current; typical values Fig 12. TR2 (PNP): Off-state input voltage as a function of collector current; typical values PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 8 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. 9. Package outline 3.1 2.7 6 5 4 0.6 0.2 1.1 0.9 3.0 2.5 1.7 1.3 pin 1 index 1 0.95 1.9 Dimensions in mm 2 3 0.40 0.25 0.26 0.10 04-11-08 Fig 13. Package outline SOT457 (SC-74) 10. Packing information Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PIMC31 Package SOT457 Description 4 mm pitch, 8 mm tape and reel; T1 4 mm pitch, 8 mm tape and reel; T2 [1] [2] [3] [2] [3] Packing quantity 3000 -115 -125 10000 -135 -165 For further information and the availability of packing methods, see Section 14. T1: normal taping T2: reverse taping PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 9 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 11. Soldering 3.45 1.95 0.95 3.3 2.825 0.95 0.45 0.55 (6x) (6x) solder lands solder resist solder paste occupied area 0.7 (6x) 0.8 (6x) 2.4 Dimensions in mm sot457_fr Fig 14. Reflow soldering footprint SOT457 (SC-74) 5.3 1.5 (4x) solder lands 1.475 5.05 1.475 Dimensions in mm preferred transport direction during soldering 1.45 (6x) 2.85 sot457_fw 0.45 (2x) solder resist occupied area Fig 15. Wave soldering footprint SOT457 (SC-74) PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 10 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 12. Revision history Table 9. PIMC31_1 Revision history Release date 20090324 Data sheet status Product data sheet Change notice Supersedes Document ID PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 11 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 13. Legal information 13.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 13.3 Disclaimers General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PIMC31_1 (c) NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 -- 24 March 2009 12 of 13 NXP Semiconductors PIMC31 500 mA, 50 V NPN/PNP double RET; R1 = 1 k, R2 = 10 k 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Quality information . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Packing information. . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 24 March 2009 Document identifier: PIMC31_1 |
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